SONJE Memory-Fabric Authority / Epoch Enforcement Architecture
Checks requesting domain, read/write permission masks and revocation epoch at the point where memory work is accepted.
Executed digital evidenceRelated canonical identities, organized together. A shared family is not a claim that every release is mutually compatible or equally qualified.
Checks requesting domain, read/write permission masks and revocation epoch at the point where memory work is accepted.
Executed digital evidenceDefines a parameterized banked controller that routes MCD-like line operations to independent banks using the proven line-store contract.
Executed digital evidenceDefines ECC, poison, scrub, remap/spare interfaces and media-specific telemetry hooks while keeping silicon retention/disturb/wear claims at foundry/vendor characterization boundaries.
Executed digital evidenceFour-bank P64 controller implementation routing full-line operations among independent production-facing banks rather than the earlier reduced-width controller proof.
Executed digital evidenceEnforces PASID, domain, epoch, permission, expected-version and lock eligibility together at P64 memory acceptance.
Executed digital evidenceProduction-facing full-width bank integrating P64 data, metadata, access guard, ECC, repair/remap and line operation paths around the controlled SRAM boundary.
Executed digital evidenceAssociates architectural version, domain/permissions/epoch, sharing mode, tier/migration state, ECC/poison/scrub, dirty/persistence and QoS/deadline state with each logical line.
Source / reference evidenceConcrete 64-byte / 512-bit VMOL datapath with 576-bit eight-lane SECDED proof-storage path and metadata-coupled control; moves the prior production target into implemented P64 technology.
Source / reference evidenceStart with a chip, a software release or a single IP block.