Evaluate the named software release
Inspect the named release and establish technical fit.
Discuss this scopeCanonical-spec compiler generating logical masters, generic transistor seeds, development Liberty shell and machine-readable qualification matrix.
GSCL Library Compiler: Canonical-spec compiler generating logical masters, generic transistor seeds, development Liberty shell and machine-readable qualification matrix. Delivered as Software / tooling. Integrate the selected version at its documented input/output boundary; retain source and configuration identity with each result. The exact callable API, dependencies and runtime environment are supplied with the controlled release; this public description is not a substitute for that release contract.
Canonical-spec compiler generating logical masters, generic transistor seeds, development Liberty shell and machine-readable qualification matrix.
Evaluation and enterprise licensing
Controlled release and integration scope
Review implementation and availability.
The controlled product-release layer includes executable reference surfaces and qualification records. Request the exact selected release bundle.
Source basis: Bible v7.42 §112 / §135, IP-4280. This is a controlled-portfolio summary, not a fresh execution of the chip qualification flow.
No protected PDK content is redistributed. Generated cell views require process-specific characterization.
Canonical record: P1-P2 / EXECUTABLE GENERATOR; OUTPUTS UNCHARACTERIZED UNTIL PHYSICAL/ELECTRICAL GATES CLOSE
Technical scope, rights, support and release configuration are agreed before delivery.
Inspect the named release and establish technical fit.
Discuss this scopeAgree deployment or design rights, deliverables and support.
Discuss this scopeDefine the customer-specific work and acceptance criteria.
Discuss this scopePoint-tool product suite with CPU qualification oracles and GPU/CUDA-capable kernels/interfaces for placement, routing, fault simulation and combinational equivalence.
Engineering softwarePlacement objective/HPWL point-tool surface with CPU qualification oracle and GPU-native acceleration boundary.
Engineering softwareRouting-demand/overflow point-tool surface with reference implementation and CUDA routing primitive.
Engineering softwareStart with a chip, a software release or a single IP block.