Define the trust boundary

Chiplet admission, quarantine and trust-boundary engine

Checks requesting domain, read/write permission masks and revocation epoch at the point where memory work is accepted.

Enforces PASID, domain, epoch, permission, expected-version and lock eligibility together at P64 memory acceptance.

Trust/security product

Trust/security product

Digital RTL implementation indexed as kx_aes_engine. The recorded role is aes engine; exact interfaces, parameters and functional coverage are release-bound.

Digital RTL implementation indexed as kx_crypto_aes_gcm. The recorded role is crypto aes gcm; exact interfaces, parameters and functional coverage are release-bound.

Digital RTL implementation indexed as kx_crypto_blake2. The recorded role is crypto blake2; exact interfaces, parameters and functional coverage are release-bound.

Digital RTL implementation indexed as kx_crypto_dilithium. The recorded role is crypto dilithium; exact interfaces, parameters and functional coverage are release-bound.

Digital RTL implementation indexed as kx_crypto_drbg. The recorded role is crypto drbg; exact interfaces, parameters and functional coverage are release-bound.

Digital RTL implementation indexed as kx_crypto_ed25519. The recorded role is crypto ed25519; exact interfaces, parameters and functional coverage are release-bound.

Digital RTL implementation indexed as kx_crypto_kdf. The recorded role is crypto kdf; exact interfaces, parameters and functional coverage are release-bound.

Digital RTL implementation indexed as kx_crypto_kyber. The recorded role is crypto kyber; exact interfaces, parameters and functional coverage are release-bound.

Digital RTL implementation indexed as kx_crypto_rng. The recorded role is crypto rng; exact interfaces, parameters and functional coverage are release-bound.

Digital RTL implementation indexed as kx_crypto_sha3. The recorded role is crypto sha3; exact interfaces, parameters and functional coverage are release-bound.

Digital RTL implementation indexed as kx_ecc_p256. The recorded role is ecc p256; exact interfaces, parameters and functional coverage are release-bound.

Digital RTL implementation indexed as kx_firewall. The recorded role is firewall; exact interfaces, parameters and functional coverage are release-bound.

Digital RTL implementation indexed as kx_hmac. The recorded role is hmac; exact interfaces, parameters and functional coverage are release-bound.

Digital RTL implementation indexed as kx_puf. The recorded role is puf; exact interfaces, parameters and functional coverage are release-bound.

Digital RTL implementation indexed as kx_rsa_modexp. The recorded role is rsa modexp; exact interfaces, parameters and functional coverage are release-bound.

Digital RTL implementation indexed as kx_sha256. The recorded role is sha256; exact interfaces, parameters and functional coverage are release-bound.

Digital RTL implementation indexed as kx_secure_enclave. The recorded role is secure enclave; exact interfaces, parameters and functional coverage are release-bound.

Distinct TDB-oriented processor architecture combining producer-ID dataflow issue, block commit/abort, capability-native memory access and a no-speculation design intent.

Checks memory request domain/authority permissions.

Boundary/control contract to qualified encryption/authentication macros without toy cryptography.

Rejects stale epoch/version operations under the KENBE transaction contract.

Composite KOURAN security model combines authority/bounds/rights, epoch revocation, domain isolation, object versioning, replay checks and an external hardened cryptographic boundary.

Execution is driven by continuation tokens rather than SKYRA hyperblocks; a continuation becomes eligible when dependency tokens, authority state and expected object version satisfy the architectural contract.

Accumulates externally visible side effects in a ledger and discards them on fault, authority failure, version conflict or abort, enabling precise recovery without whole-graph rollback.

Standalone integrated engineering system combining differential FeFET universal-memory/CIM architecture, ECC/program-verify control, scrub/MBIST/BISR/remap/wear telemetry, AXI4-Lite + Wishbone software integration, bare-metal driver and OmniRT runtime policy/model surfaces.

Composite security model spanning native capability checks, TEE isolation, secure/measured boot root, memory-encryption boundary, epoch revocation, and side-channel hooks.

Multi-context authenticated-encryption datapath architecture.

Security — multi-source silicon PUF root-key subsystem

Security — post-quantum-ready root of trust and secure boot

Security — side-channel/fault-resistance execution wrapper

Security — high-rate multi-entropy TRNG subsystem

Journaled commit groups, persist barriers, write-intent and replay/recovery contracts.

Domain/authority/epoch/version/replay/integrity control with certified crypto macro boundary.

A generation/profile record within the first-principles FPP packaging family.

Composes IP/chiplets/packages from capability and compatibility manifests

Isolation, fault containment, reset/power policy, test and telemetry supervision